Acacia has revealed its 1.2T faceplate pluggable coherent module, which highlights what the company refers to as an eighth generation coherent interconnect module family, powered by the company’s Jannu 5nm CMOS digital signal processor (DSP) ASIC.
The Jannu DSP is designed to offer network operators the ability to maximise transmission data rate across a wide range of multi-haul network applications including DCI, metro, long-haul and subsea.
The architecture of the new Coherent Interconnect Module 8 (CIM 8) solution builds upon the success of the Acacia AC1200 product family and aligns closely with the latest client data rates and coherent industry standardization efforts. It is designed to enable network operators to double their transmission capacity over even greater reaches. For links requiring maximum capacity, the new module can provide 1.2T capacity over a single wavelength.
In its blog surrounding the launch, the company explained how coherent technology has evolved in response to growing bandwidth demands. Different baud-rate classes are grouped based on technological capabilities, industry standardisation and common industry investments. The next class of coherent optical products, Class 3, it says, enables a doubling of baud rates from the current Class 2 technology. Class 2 products include both multi-haul embedded modules and 400G faceplate pluggables where the latter was driven by standardization efforts that drove heavy investments into products centered around 16QAM, 60+Gbaud per 75GHz channel transmission. Acacia’s Class 3 product will support 150GHz channels with double the capacity per carrier and longer reach than that of the previous class. It can address transmission of multiple 400GbE client interfaces over almost any network application, delivering 1.2T per carrier capacity for high-capacity DCI interfaces and 800G per carrier capacity over most optical links using 4 bits/symbol (~16QAM) modulation.
The Jannu DSP features Acacia’s second-generation 3D Shaping technology, which leverages enhanced probabilistic constellation shaping (PCS) algorithms and Adaptive Baud Rate, a feature introduced in Acacia’s Pico DSP and widely embraced by network operators. It will provide customers with continuous baud rate adjustment up to 140GBd to optimize utilization of available spectrum in a single-span or in cascaded ROADM paths.
As a single carrier design, it also includes the company’s advanced line-rate processing algorithms to efficiently overcome fiber transmission impairments over greenfield or brownfield fiber infrastructures. These power-efficient algorithms are designed to compensate linear and non-linear impairments, as well as provide state-of-polarization (SOP) tracking with industry leading response times.
Acacia’s 3D Siliconization is a contributing factor in how the CIM 8 can cross the terabit capacity threshold and support faceplate pluggable optics that simplify network deployment and maintenance. 3D Siliconization applies integration and 3D stacking packaging techniques to enable a single device to include all the high speed opto-electronic functions necessary for coherent transceivers. This device decreases footprint by including the DSP, SiPh PIC, drivers, TIAs, and is manufactured using standard CMOS packaging processes that leverage the same reliability, cost, and volume scaling advantages.