TE Connectivity (TE), in collaboration with Intel is demonstrating its 224Gb/s PAM4 Long Reach development efforts at OFC 2023.
The demonstrations take place against a backdrop of industry developments for high-speed solutions at 224Gb/s to enable higher speeds for networking and AI applications. The first consists of Intel’s 224Gb/s test chip addressing TE’s over-the-board (OTB) architecture consisting of a 224 near-chip cable assembly. TE’s 224Gb/s AdrenaLINE Catapult product helps enable premium signal integrity channels for near-chip to near-chip, near-chip to cabled input/output (I/O) ports, and near-chip to cabled backplane architectures in next generation equipment.
The company’s fine pitch interconnect technology combined with its cutting-edge copper cable solutions enable cable connectivity in extreme close proximity to an ASIC or FPGA at 224G speeds. TE says that this can provide notable signal integrity transition to the ASIC or FPGA as required for minimal equalisation. This type of internal cable assembly can enable flexible architectures to help realise next-generation equipment such as switches, routers, and accelerator fabrics.
In the second demonstration, the same Intel transceiver addresses an octal small form-factor pluggable (OSFP) based channel consisting of TE’s prototype OSFP 224Gb/s connector and cage with a 1m OSFP passive DAC copper cable, a long reach objective set by IEEE for its 200G lane rate.
Nathan Tracy, technologist and manager of industry standards at TE Connectivity says: “It is exciting to see the progress that Intel has made in developing 224Gb/s SerDes IP that can help enable next generation networks. Intel is leading the FPGA industry through its world’s first 224Gb/s PAM4-LR transceiver test chip which has demonstrated flexibility, scalability, and excellent power and performance for bandwidth-intensive and reach-flexible applications.”
Mike Peng Li, a fellow on SerDes and I/O, Intel Corporation adds: “TE’s 224G development work based on Intel’s 224 Gbps PAM4-LR transceiver is showing great progress toward helping enable next generation architectures both inside equipment and in between equipment.”
The DAC demonstration is taking place, both at Intel’s booth #2901 and TE’s booth #6035. The internal cable assembly demonstration “AdrenaLINE Catapult near-chip connector” can be seen at TE’s booth #6035.
